Brad received his BS, MS, and PhD in electrical and computer engineering from the University of Illinois in ’85, ’87 and ’91 respectively. His primary interests were electromagnetic modeling and simulation. Brad joined IBM East Fishlkill in September of 1991 and continued his work on electromagnetic design and electronic packaging for IBM’s mainframe systems. In ’96 he moved to IBM Austin and began working on POWER systems. In Austin, Brad designed the packaging and cache subsystem for the POWER3 processor.  Brad then became one of the lead Architects of IBM’s POWER4 systems and chip. Brad went on to become the POWER4 system chief engineer and delivered that system in 2001. After delivering the POWER4 systems, Brad led the design and delivery of the POWER6 processor for IBM. After delivering POWER6 chip designs, Brad focused on POWER7 systems. His responsibilities included delivery of all system components including hardware and software elements. In 2004 Brad was appointed to the position of IBM Fellow. In 2009 Brad was appointed to the position of IBM Vice President and Fellow and leading POWER processor and chipset development. In 2012 Brad was appointed to the position of CTO for STG.